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Potential x86-64-v5 feature level #206

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opened 2023-08-08 16:10:29 +02:00 by GreyXor · 2 comments
GreyXor commented 2023-08-08 16:10:29 +02:00
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Intel just disclosed AVX10, a vector ISA evolution that includes all the capabilities and features of the Intel AVX-512 ISA in a converged version which can run on both E-cores and P-cores.

IMO it could be a potential new feature set called x86-64-v5.
We're still a long way from compatible compilers nor processors, but I'm creating this issue to keep track of potential developments.

Architecture Specification
Technical Paper
GCC Compiler Patches
LLVM discussion

> Intel just disclosed AVX10, a vector ISA evolution that includes all the capabilities and features of the Intel AVX-512 ISA in a converged version which can run on both E-cores and P-cores. IMO it _could_ be a potential new feature set called `x86-64-v5`. We're still a long way from compatible compilers nor processors, but I'm creating this issue to keep track of potential developments. [Architecture Specification](https://cdrdv2.intel.com/v1/dl/getContent/784267) [Technical Paper](https://cdrdv2.intel.com/v1/dl/getContent/784343) [GCC Compiler Patches](https://gcc.gnu.org/pipermail/gcc-patches/2023-August/626601.html) [LLVM discussion](https://discourse.llvm.org/t/rfc-design-for-avx10-feature-support/72661)
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anonfunc added the
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GreyXor changed title from Potential v5 feature level to Potential x86-64-v5 feature level 2023-08-10 11:49:23 +02:00
GreyXor commented 2023-11-10 13:07:58 +01:00
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Intel Posts Latest AVX10.1-256 & AVX10.1-512 Compiler Patches For GCC

This new patch is what goes ahead to now add the compiler options for "-mavx10.1", "-mavx10.1-256", and "-mavx10.1-512" compiler options. It also adds the respective "-mnoavx10.1" options. Plus it adds other plumbing around toggling of AVX10.1 / AVX10.1-256 / AVX10.1-512 support within the GCC compiler code.

https://gcc.gnu.org/pipermail/gcc-patches/2023-November/635918.html
source: https://www.phoronix.com/news/Intel-AVX10.1-256-512-GCC

Intel Posts Latest AVX10.1-256 & AVX10.1-512 Compiler Patches For GCC > This new patch is what goes ahead to now add the compiler options for "-mavx10.1", "-mavx10.1-256", and "-mavx10.1-512" compiler options. It also adds the respective "-mnoavx10.1" options. Plus it adds other plumbing around toggling of AVX10.1 / AVX10.1-256 / AVX10.1-512 support within the GCC compiler code. https://gcc.gnu.org/pipermail/gcc-patches/2023-November/635918.html source: https://www.phoronix.com/news/Intel-AVX10.1-256-512-GCC
GreyXor commented 2023-11-21 12:39:19 +01:00
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https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=2f8f7ee2db82a315f9faf8b306d6203ca7f7b002

https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=2f8f7ee2db82a315f9faf8b306d6203ca7f7b002
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