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Add support for chip specific register sets

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Signed-off-by: Guenter Roeck <linux@roeck-us.net>
This commit is contained in:
Guenter Roeck
2017-03-19 00:57:24 -07:00
parent 20dba182dc
commit 3be51e20cb
1 changed files with 64 additions and 21 deletions
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85
it87.c
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@@ -242,16 +242,27 @@ static bool fix_pwm_polarity;
* - up to 6 fan (1 to 6)
*/
static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
static const u8 IT87_REG_FAN_8665[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
static const u8 IT87_REG_FAN_MIN_8665[] =
{ 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
static const u8 IT87_REG_FANX_8665[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
static const u8 IT87_REG_FANX_MIN_8665[] =
{ 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
#define IT87_REG_FAN_MAIN_CTRL 0x13
#define IT87_REG_FAN_CTL 0x14
static const u8 IT87_REG_PWM[] = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
static const u8 IT87_REG_PWM_DUTY[] = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
static const u8 IT87_REG_PWM[] = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
static const u8 IT87_REG_PWM_8665[] = { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
static const u8 IT87_REG_PWM_DUTY[] = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
static const u8 IT87_REG_VIN[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
@@ -573,6 +584,13 @@ struct it87_data {
u8 peci_mask;
u8 old_peci_mask;
const u8 *REG_FAN;
const u8 *REG_FANX;
const u8 *REG_FAN_MIN;
const u8 *REG_FANX_MIN;
const u8 *REG_PWM;
unsigned short addr;
const char *name;
struct mutex update_lock;
@@ -766,7 +784,7 @@ static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
{
data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
data->pwm_ctrl[nr] = it87_read_value(data, data->REG_PWM[nr]);
if (has_newer_autopwm(data)) {
data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
data->pwm_duty[nr] = it87_read_value(data,
@@ -854,15 +872,15 @@ static struct it87_data *it87_update_device(struct device *dev)
continue;
data->fan[i][1] =
it87_read_value(data, IT87_REG_FAN_MIN[i]);
it87_read_value(data, data->REG_FAN_MIN[i]);
data->fan[i][0] = it87_read_value(data,
IT87_REG_FAN[i]);
data->REG_FAN[i]);
/* Add high byte if in 16-bit mode */
if (has_16bit_fans(data)) {
data->fan[i][0] |= it87_read_value(data,
IT87_REG_FANX[i]) << 8;
data->REG_FANX[i]) << 8;
data->fan[i][1] |= it87_read_value(data,
IT87_REG_FANX_MIN[i]) << 8;
data->REG_FANX_MIN[i]) << 8;
}
}
for (i = 0; i < NUM_TEMP; i++) {
@@ -1270,9 +1288,9 @@ static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
if (has_16bit_fans(data)) {
data->fan[nr][index] = FAN16_TO_REG(val);
it87_write_value(data, IT87_REG_FAN_MIN[nr],
it87_write_value(data, data->REG_FAN_MIN[nr],
data->fan[nr][index] & 0xff);
it87_write_value(data, IT87_REG_FANX_MIN[nr],
it87_write_value(data, data->REG_FANX_MIN[nr],
data->fan[nr][index] >> 8);
} else {
reg = it87_read_value(data, IT87_REG_FAN_DIV);
@@ -1289,7 +1307,7 @@ static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
}
data->fan[nr][index] =
FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
it87_write_value(data, IT87_REG_FAN_MIN[nr],
it87_write_value(data, data->REG_FAN_MIN[nr],
data->fan[nr][index]);
}
@@ -1336,7 +1354,7 @@ static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
/* Restore fan min limit */
data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
it87_write_value(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
mutex_unlock(&data->update_lock);
return count;
@@ -1416,7 +1434,7 @@ static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
ctrl = data->pwm_duty[nr];
}
data->pwm_ctrl[nr] = ctrl;
it87_write_value(data, IT87_REG_PWM[nr], ctrl);
it87_write_value(data, data->REG_PWM[nr], ctrl);
}
} else {
u8 ctrl;
@@ -1430,7 +1448,7 @@ static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
}
data->pwm_ctrl[nr] = ctrl;
it87_write_value(data, IT87_REG_PWM[nr], ctrl);
it87_write_value(data, data->REG_PWM[nr], ctrl);
if (data->type != it8603 && nr < 3) {
/* set SmartGuardian mode */
@@ -1477,7 +1495,7 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
*/
if (!(data->pwm_ctrl[nr] & 0x80)) {
data->pwm_ctrl[nr] = data->pwm_duty[nr];
it87_write_value(data, IT87_REG_PWM[nr],
it87_write_value(data, data->REG_PWM[nr],
data->pwm_ctrl[nr]);
}
}
@@ -1578,7 +1596,7 @@ static ssize_t set_pwm_temp_map(struct device *dev,
if (data->pwm_ctrl[nr] & 0x80) {
data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
data->pwm_temp_map[nr];
it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
}
mutex_unlock(&data->update_lock);
return count;
@@ -3000,6 +3018,31 @@ static void it87_init_device(struct platform_device *pdev)
int tmp, i;
u8 mask;
/* Initialize chip specific register pointers */
switch (data->type) {
case it8665:
data->REG_FAN = IT87_REG_FAN_8665;
data->REG_FANX = IT87_REG_FANX_8665;
data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
data->REG_PWM = IT87_REG_PWM_8665;
break;
case it8622:
data->REG_FAN = IT87_REG_FAN;
data->REG_FANX = IT87_REG_FANX;
data->REG_FAN_MIN = IT87_REG_FAN_MIN;
data->REG_FANX_MIN = IT87_REG_FANX_MIN;
data->REG_PWM = IT87_REG_PWM_8665;
break;
default:
data->REG_FAN = IT87_REG_FAN;
data->REG_FANX = IT87_REG_FANX;
data->REG_FAN_MIN = IT87_REG_FAN_MIN;
data->REG_FANX_MIN = IT87_REG_FANX_MIN;
data->REG_PWM = IT87_REG_PWM;
break;
}
/*
* For each PWM channel:
* - If it is in automatic mode, setting to manual mode should set
@@ -3143,7 +3186,7 @@ static int it87_check_pwm(struct device *dev)
for (i = 0; i < ARRAY_SIZE(pwm); i++)
pwm[i] = it87_read_value(data,
IT87_REG_PWM[i]);
data->REG_PWM[i]);
/*
* If any fan is in automatic pwm mode, the polarity
@@ -3158,7 +3201,7 @@ static int it87_check_pwm(struct device *dev)
tmp | 0x87);
for (i = 0; i < 3; i++)
it87_write_value(data,
IT87_REG_PWM[i],
data->REG_PWM[i],
0x7f & ~pwm[i]);
return 1;
}