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Fix PECI/AMDTSI selection

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We can not use register 0x98 since it is typically not programmed
on systems selecting PECI. Try register 0x0a (Interface Selection)
which should be a better fit anyway.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
This commit is contained in:
Guenter Roeck
2017-10-07 07:38:41 -07:00
parent 4f8c82e23c
commit 6582b4739f
1 changed files with 9 additions and 4 deletions
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13
it87.c
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@@ -258,6 +258,10 @@ static bool fix_pwm_polarity;
* Super-I/O configuration space. * Super-I/O configuration space.
*/ */
#define IT87_REG_VID 0x0a #define IT87_REG_VID 0x0a
/* Interface Selection register on other chips */
#define IT87_REG_IFSEL 0x0a
/* /*
* The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
* for fan divisors. Later IT8712F revisions must use 16-bit tachometer * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
@@ -1465,11 +1469,12 @@ static int get_temp_type(struct it87_data *data, int index)
if (type) if (type)
return type; return type;
/* Dectect PECI vs. AMDTSI if possible */ /* Dectect PECI vs. AMDTSI */
ttype = 6; ttype = 6;
if ((has_temp_peci(data, index)) && data->type != it8721) { if ((has_temp_peci(data, index)) || data->type == it8721 ||
extra = data->read(data, 0x98); /* PCH/AMDTSI host status */ data->type == it8720) {
if (extra & BIT(6)) extra = data->read(data, IT87_REG_IFSEL);
if ((extra & 0x70) == 0x40)
ttype = 5; ttype = 5;
} }