Some chips support Environmental Controller access through SMBus.
On those chips, it is possible that an Embedded Controller accesses
Environmental Controller chip registers at any time. There is no real
means for synchronization. On banked chips, this can and will result in
access errors with unpredictable result.
Disable SMBus access while reading or writing environmental controller
registers to work around the problem.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Temperature sensor types won't change, so we only need to read it once.
Also fix temperature register calculation.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
There is some indication that other entities (BIOS ? EC ?) may access
the chip asynchronously. Restore the bank selection after read/write
operations to limit any potenial impact.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Introduce two new type values, 7 for 'virtual' and 8 for 'other'.
This will need to be added to the ABI once approved.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
With the reworked temperature mapping it was no longer possible to set
manual mode since the 'automatic' configuration bit was never cleared.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
It appears that some BIOSes reserve ACPI resources without using them,
and acpi_enable_resources=lax seems to result in failures to load
certain drivers.
Introduce a 'ignore_resource_conflict' module parameter as alternate
means to ignore ACPI resource conflicts.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Various chips have different numbers of valid values for pwm temperature
mapping. Rework the code to take this into account.
No longer keep map as bitmap, but maintain it as number 1..X. Do not try to
define a separate mapping entry for pwm4..6 on chips where the temperature
map for those pwm controls is taken from a different temperature input.
Introduce helpers to convert the control register contents to a map and
vice versa.
Reflect that IT8607 uses the new temperature map in bit 3..5 of the pwm
control register.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
If pwmX_enable is written prior to displaying any attributes,
t87_update_pwm_ctrl() is never called, and the cached pwm registers
are never read before written. This results in bad values written
into various registers, and can result in operational failures.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
The observed problems with IT8792E were after all not caused by ACPI
mutex problems, so drop that code for now.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
If IT8792E or a compatible chip such as IT8795 (which has the same chip ID,
0x8733) resides at SIO address 0x4e/0x4f, and another Super-IO chip is at
SIO address 0x2e/0x2f, the IT8792E causes a cycle decode problem when exiting
its configuration mode. This can result in access errors for both chips, and
may result in system hangs.
Never exit configuration mode for IT8792E to avoid the problem.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Since we now count the number of temperature offset registers directly,
there is no need for the temperature offset feature flag anymore.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
IT8628E has 6 temperature limit registers, overlayed with VIN7..VIN9
limit registers, but only 3 temperature offset registers. Given that,
introduce separate variables for the number of temperature limit
registers and the number of temperature offset registers.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Configuration register access of the second Super-IO chip on AB350M-D3H
is just as broken as the others and can result in the known system hang-up.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
This is mostly identical to IT8665E, with the exception of the
configuration bits for fans 4 and 5.
Signed-off-by: Justin Maggard <jmaggard@netgear.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Several recent chips have a different register definition for
temperature to pwm assignment. Introduce FEAT_NEW_TEMPMAP to reflect
this and assign to affected chips.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Feature detection and pwm temperature mapping differs from other chips.
Also disable pwm1, fan1, vin3, and vin6.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
The ADC LSB on some newer chips such as IT8613E and IT8625E is
officially 11mV, not 10.9mV. Add support for it.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
- Acquire acpi mutex (not supported in upstream kernel)
- Try to handle 0x4e access failures on Gigabyte boards
- Improve temperature register / limit / type support for recent chips
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Several recent chips don't support configuration bits to turn fan control
off entirely for the first three fans. Handle all of them with a
configuration flag.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Some chips have internal voltage scaling but 10.9mV ADC,
so we can no longer associate the 12mV ADC with internal scaling
but need a different flag to distinguish scaling support.
Also fix ADC resolution for IT8790E and IT8792E.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
